There are 3 main kinds of transistors - Bipolar, Junction
Field-Effect (JFETs), and Metal-Oxide semiconductor FETs (MOSFETs).
Both come in N and P varieties with opposite polarities. This page is
about JFETs and compares them to bipolar transistors to illustrate why
JFETs work better for simple preamp stages. MOSFETs are not discussed
There's a lot of talk about why tubes sound better than transistors,
often attributed to how tubes clip gently and transistors clip with
hard edges. Roughly accurate but there's more to it than that -
transistors don't necessarily clip hard and tubes can clip with hard
edges when pushed. Rather, the main difference is a tube (and a JFET)
is a voltage-driven device that's fairly linear when biased properly,
whereas a transistor is a current-driven device that tends to be more
nonlinear and usually requires negative feedback to correct, that's
where the hard clipping edges come from, especially in the extreme case
Here's a simple bipolar transistor preamp stage with varying amounts
Before clipping it looks ok but the distorted waveform is.. well
yuk. The top of the wave rounds and the bottom squares, and when
distorted the base rectifies the input signal causing the duty cycle
to shift, basically losing power. Some duty cycle shift is OK but with
this circuit it only gets worse the harder it's pushed and there's no
way around it because the base is biased positive to the emitter, any
distortion that causes the emitter to stop following the input signal
turns the base into a diode. The resistor values are fairly high in
example but reducing all the resistors by a factor of 10 (and
increasing the caps by 10) makes little difference other than
increasing the current drain.
Here's an almost identical circuit using a JFET instead of a
Much better! There's still a hint of rounding on the top of the wave
but it's partially because it's not biased perfectly centered. Compared
to the bipolar transistor, the FET stays
cleaner until it reaches clip then it flattens more or less the same on
both sides, and there is no duty cycle shift. Eventually the gate will
shift the duty cycle but it takes over a volt of input as the gate is
negative to the source, the signal has to exceed the bias point plus
the juction drop before rectification can occur. Tubes do a similar
thing (to a greater extent as the signal voltage vs rectification
voltage is greater) but the solution is the same - add some resistance
between the output of a stage and the gate of the next stage (or in
series with the gate) so if the gate conducts at least it won't load
the previous stage and cause further issues. But keep in mind that
resistors are noise makers by the laws of the universe, use only as
many ohms as needed.
The 2N4393 shown in the simulation is available but the common J113
has practically identical specs (Vgs threshold from -0.5V to -3.0V) and
about the same in this circuit. To minimize unit-unit variation I made
source resistor the same as the drain resistor, typically the source
biases about 1.3V above the gate with a typical variation of +/- 0.4V
(but not guaranteed!),
because the source and drain resistors are the same value this limits
the drain bias shift to the same amount. There will be some unit-unit
variation but it's less than in typical JFET example circuits that omit
R3 and use a smaller resistor for R4, those circuits usually require a
trimmer for R4. The gain is determined roughly by R6 divided by the
parallel combination of R4 and R5 (minus a bit) so if R4 is a trimmer
it's going to also change the gain (and also the output level). Also
note that dialing up more gain
by reducing R5 increases the clean distortion and causes more pre-clip
rounding on the top side of the wave. Biasing the gate positive with a
larger source resistor limits the output swing but it's worth it
to reduce variability, and if trimming is needed it can be done using
R3 or R4 with less gain variation. It also simplifies the design
- whatever the supply voltage is, divide it by 3 and bias the gate to
that voltage minus the FET's typical operating gate voltage, which for
the J113 is about 1.3V. So 1.6V on the gate results in 2.9V on the
source, 2.9V across the drain resistor and 3.1V across the FET, in the
ballpark. It's a
bit more complicated than that, the source follows the signal (unless
R5 is 0) so the bottom clip point gets pushed up by the signal on the
source - so having a bit more voltage across the FET is a good thing -
but there's also loading effects which tends to need less voltage
across the FET to balance out the clipping.
Now to analyze the distortion characteristics using FFT plots.
Before distortion there isn't much difference...
For both the transistor and the FET the 2nd harmonic is about 32db
down, or roughly 2% distortion, the other harmonics fall off about the
same. Running clean both these circuits will sound about the same -
transistors can be "warm" sounding, at least much better than chips.
Running the circuits into clipping better shows the difference...
Besides the FET waveform looking better, the higher harmonics drop
off more rapidly. The transistor's spectrum looks harsh and this is
fairly mild clipping.
Here are the LTspice (version 4) files for the above simulations...
transistor.asc.txt - the basic bipolar circuit
transistor1.asc.txt - modified for FFT analysis
tfet.asc.txt - the basic JFET circuit
tfet1.asc.txt - modified for FFT
(remove the .txt extension or copy to an .asc file)
LTspice is available from Linear Technology's
software page, I use version 4 (under wine) but a newer version is
available. Simulation isn't perfect but for what it does it's almost
like magic. Just keep in mind that it doesn't model parasitic effects
from the circuit layout and the components are assumed to be perfect
unless otherwise specified. Usually if a circuit works in LTspice it'll
work in the real world although sometimes it might need a few tweaks to
compensate for effects that are not modeled. For audio usually the
simulation is spot-on.
A 3-way Tone Network using a JFET
Disclaimer - I haven't actually built this circuit... it "should"
work pretty much like the simulation but the component values in the
tone network will likely need "by ear" adjustment depending on the
This circuit implements a 3-band cut/boost-type tone control network
using a JFET
for the gain stage. With the controls centered the gain is roughly
unity (minus about a db). The bass control (on top) has a range of
about +/-10db at 80hz (more at lower frequencies), the mid control has
a range of about +/-7db at 1khz, and the treble control has a range of
about +/-10db at 7khz (more at higher frequencies). This type of tone
network probably wouldn't make for good guitar amp tones by themselves
(too flat, guitar amps typically scoop the mids), the application I had
in mind is putting it after an overdrive circuit that's already
equalized to sound about right to allow better control over the
The circuit has a fairly low input impedance (about 15K) that varies
with frequency so it should be driven from a low impedance source. For
high impedance sources use a buffer such as this circuit...
in >--0.01u---*----->| J113
| *---1u---> to EQ
Because the circuit cuts and boosts, keep
the input level fairly low (around 100mV RMS) to avoid clipping at
extreme settings. The circuit has a fairly low output
impedance (about 5K) but if driving an input with an impedance of less
than 100K increase the size of C7 to avoid bass loss.
Here's the circuit response with the tones flat and driven slightly
Maximum undistorted output is roughly 1.7V RMS, FET variation might
reduce this somewhat if not biased perfectly centered. The
bottom bias resistor is slightly bigger than the previous examples
because the higher current means less gate-source voltage difference
because the source resistor is fully bypassed so it won't be going up
and down with the signal. Note how the gate signal is distorted as the
feedback corrects the distortion of this configuration. Controls U1 to
U3 are 300K linear-taper controls, 250K linear controls should also
work OK. In the simulation the controls ended up being backwards,
wiper=0 for all the way up and 1 for all the way down, the correct
orientation is for the wiper to travel to the left (towards the input)
as the control is increased.
C4 sets the bass control frequency, C6 sets the mid control lower
frequency, C5 sets the mid control high frequency, and C2 and C3
control the treble control frequency (could just be a single capacitor
in series with R10 but this arrangement permits setting the cut and
boost frequencies separately). R5 and R6 set the bass control range, R8
and R7 set the mid control range, R10 sets the treble control range. R9
is fairly large compared to the other resistors to minimize interaction.
Here are AC response plots for various control positions. Flat and
with the bass control 90% up (sim wiper setting at 0.1)...
Bass at 10%, mid at 90%...
Mid at 10%, treble at 90%...
Treble at 10%, the last plot is with the bass at 90%, the mid at 10%
and the treble at 80%...
Here's the tonecb_ac.asc.txt
simulation file and the potentiometer
model it needs to run.
An Old-Style Guitar Preamp using
This is similar to the preamp used in ShoBud amps with more of a
rock-n-roll twist - I used a 50K mid control (with an extra capacitor)
instead of the usual 10K, and added a master volume between the 2nd
stage FET and the output buffer. The original ShoBud preamp had no
master and the base of the output buffer transistor (a regular bipolar
NPN) connected directly to the drain of the 2nd stage, an arrangement
that wasn't designed to be clipped. Although provisions are made to let
it get a bit dirty, it's not an overdrive preamp and is more like the
clean channel of a typical tube amp. The output of the circuit can be
run into any typical power amplifier that needs a volt or less for full
output. Or run through a reverb circuit or an effects loop first. This
is another circuit I've only "built" in simulation in this exact form
but I've used variations of this many times over the last decades and
it sounds very much like a tube amp.
Here's the circuit running clean and clipped...
The circuit runs at 18V, the simulation schematic shows 50V because
that's what's typically available from the power amp section, reduce
R20 if running from a lower voltage to ensure that the zener diode
conducts and properly regulates the supply. The simulation shows 2N4393
but almost any N-channel JFET with a reasonably low Vgs threshold
should work - J113, MPF102, 2N5457 etc. If clipping is off-centered
tweak the values of R5 and R12 (with a J113 model I needed 75K for
symmetrical clipping). R6 and R13 set the gains of the first
and second stages, reduce for more gain. I configured the first stage
has less gain to avoid overloading the input stage.
The tones resemble a normal guitar amp tone stack but I used
somewhat different capacitor values, made the mid control bigger to
make it more useful for boosting the gain. The extra capacitor C13
keeps it from boosting the highs along with the mids. C6 and R9 add a
high treble boost at lower volume settings, R9 controls how much
brightness is added. R9 is often a switch for full bright. The
simulation shows some rolloff above 8khz, not sure what's up with that
since there are no added high-cut caps (probably the "miller"
capacitance of the 2nd FET). Guitar speakers cut off around 7khz so it
doesn't matter much but this might be one of those areas where
simulation deviates from reality.
Here's the AC response with the controls centered (20% log
The following plots show the response with the treble, mid and bass
each at 10% and 90% with the others centered...
Something resembling flat is obtained with the treble at 50%, the
mid all the way up and the bass at 20%...
Here's the fetgpre_ac.asc.txt
LTspice simulation file, requires the potentiometer_standard
with unit-to-unit variation
JFETs have very loose specs when it comes to gate threshold, for a
1uA threshold the J113 has a specified Vgs from -0.5V to -3.0V. Other
units are no better, it's just something the designer has to deal with
when using JFETs. Biasing the gate positive and using a big source
resistor helps (in that the circuit will usually work) but it does not
eliminate the variability, especially when running from 9V as with a
Here's a J113 model that can be used with LTspice to explore the
effect of varying gate thresholds...
.MODEL J113 NJF (VTO=-1.29 BETA=9.25964E-003
+ LAMBDA=3.03839E-002 RD=1.30170 RS=1.30170 IS=9.86870E-016
+ CGS=1.05000E-011 CGD=1.20000E-011 PB=5.04493E-001 FC=0.5)
To use this model select the text icon and select spice directive,
paste the above text into the text box and place anywhere on the
schematic, then the 2N4393 text can be changed to J113 (right-click and
change the part label text itself, it won't show up in the part select
dialog). The default VTO is -1.29 but this can be changed to explore
the effects of variability.
Here's the simple preamp circuit with the default threshold...
Here's the waveforms with the VTO=-0.9 and with VTO=-1.7 (about +/-
...yea that's a problem. Both will "work" but will sound different.
Here's the guitar preamp with the J113 model (source resistors
changed from 82K to 75K)...
Here's the response with VTO=-0.9V and VTO=-1.7V...
...not as bad because it's running at twice the supply voltage, but
still some variation.
So what to do? One thing that can be done is replace the source
resistors with trimmers, especially the last stage where the effect is
most noticeable. But that adds cost and there's the additional labor
step of connecting it to a signal generator and scope to make the
adjustment. Another way to compensate is to grade the FETs - Here's a
test circuit that replicates the bias of a preamp circuit...
FET | |
under D O-----------|----*----47K-----*------O +
test | | | 9V battery
S O--47K--. 470K `-> - + <-' .--O -
| | to meter |
Since the source and drain resistors are the same, for proper
unloaded response the meter should read about 3V, but typically you'll
need a bit more voltage to account for loading effects, 3.1V or so with
a 150K load. Regardless go through a bunch of FETs to see what the
average is then in your circuit size the top bias resistor (or the
source resistor) to produce the desired clip characteristics. Mark all
the FETs close to the average say yellow, these are the "good" ones. If
the meter reading is less the FET draws less current, paint it green
and to optimize it use a smaller resistor for the top bias resistor. If
the meter reading is greater paint it red and use a bigger resistor to
optimize. Or just use the yellow ones for the last stage and put the
reds and greens earlier in the preamp where exact clipping symettry
isn't an issue.
Last modified November 22, 2016
Terry Newton (firstname.lastname@example.org)